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SY89854U
Precision Low Power 1:4 LVPECL Fanout Buffer/Translator with Internal Termination
General Description
The SY89854U is a 2.5V/3.3V precision, highspeed, fully differential 1:4 LVPECL fanout buffer. Optimized to provide four identical output copies with less than 20ps of skew and less than 10ps(pp) total jitter, the SY89854U can process clock signals as fast as 2GHz. The differential input includes Micrel's unique, patent pending 3-pin input termination architecture that interfaces to any differential signal (AC or DCcoupled) as small as 100mV (200mVpp) without any level shifting or termination resistor networks in the signal path. For AC-coupled input interface applications, an on-board output reference voltage (VREF-AC) is provided to bias the center-tap (VT) pin. The outputs are 800mV LVPECL, with fast rise/fall times guaranteed to be less than 180ps. The SY89854U operates from a 2.5V 5% supply or a 3.3V 10% supply and is guaranteed over the full industrial temperature range of -40C to +85C. The SY89854U is part of Micrel's high-speed, (R) Precision Edge product line. All support documentation can be found on Micrel's web site at: www.micrel.com.
Precision Edge
(R)
Features
* Precision 1:4, LVPECL fanout buffer * Low power: 137mW (2.5V typ) * Guaranteed AC performance over temperature and supply voltage: - DC- to > 2GHz Clock fMAX - <340ps tpd - <180ps tr/tf time - <20ps max. skew * Ultra-low jitter design: - <1ps(rms) random jitter - <10ps(pp) deterministic jitter - <10ps(pp) total jitter (clock) * Unique patent pending input termination and VT pin accepts DC-coupled and AC-coupled inputs (CML, PECL, LVDS) * Typical 800mV (100k) LVPECL output swing * Power supply 2.5V 5% or 3.3V 10% * Industrial temperature range -40C to +85C * Available in ultra-small (3mm x 3mm) 16-pin MLFTM package
Typical Applications
200MHz (Q - /Q)
Applications
* SONET and All GigE clock distribution * Fibre Channel clock and data distribution * Backplane distribution
Output Swing (200mV/di .) v
TIME (600ps/di v.)
Precision Edge is a registered trademark of Micrel, Inc. MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc.
June 2005
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SY89854U
Ordering Information(1)
Part Number SY89854UMG SY89854UMGTR
Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25C, DC Electricals Only. 2. Tape and Reel.
(2)
Package Type MLF-16 MLF-16
Operating Range Industrial Industrial
Package Marking 854U with Pb-free bar-line indicator 854U with Pb-free bar-line indicator
Lead Finish Pb-Free NiPdAu Pb-Free NiPdAu
Pin Configuration
16-Pin MLFTM (MLF-16)
Pin Description
Pin Number Pin Name Pin Function Differential Input: This input pair is the signal to be buffered. These inputs accept AC- or DC-coupled differential signals as small as 100mV (200mVpp). Each pin of this pair internally terminates to a VT pin through 50. Note that this input will default to an indeterminate state if left open. Please refer to the "Input Interface Applications" section for more details. Input Termination Center-Tap: Each side of the differential input pair terminates to this pin. The VT pin provides a center-tap to a termination network for maximum interface flexibility. See "Input Interface Applications" section for more details. Positive Power Supply. Bypass with 0.1F0.01F low ESR capacitors as close to the VCC pin as possible. Differential 100K LVPECL Output: These LVPECL outputs are the precision, low skew copies of the input signal. Terminate with 50 to VCC-2V. Unused output pairs may be left floating with no impact on jitter. See "Output Interface Applications" section. Ground. Ground pin and exposed pad must be connected to the same ground plane. Reference Voltage: This output biases to VCC-1.2V. It is used when AC coupling the inputs (IN, /IN). Connect VREF-AC to the VT pin. Bypass VREF-AF pin with a 0.01F low ESR capacitor to VCC. Maximum sink/source capability is 1.5mA. See "Input Interface Applications" section for more details.
1, 4
IN, /IN
2
VT
8,13 15, 14 12, 11 10, 9 7, 6 5, 16
VCC Q0, /Q0 Q1, /Q1 Q2, /Q2 Q3, /Q3 GND, Exposed Pad VREF-AC
3
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SY89854U
Functional Block Diagram
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Absolute Maximum Ratings(1)
Supply Voltage (VCC) ..........................-0.5V to +4.0V Input Voltage (VIN) ..................................-0.5V to VCC LVPECL Output Current (IOUT) Continuous ................................................. 50mA Surge........................................................ 100mA Termination Current(3) Source or sink current on VT .................... 50mA Input Current Source or sink current on IN, /IN.............. 50mA VREF-AC Current(3) Source or sink current ................................ 2mA Lead Temperature (soldering, 20sec.) ...........+260C Storage Temperature (Ts)..................-65C to 150C
Operating Ratings(2)
Supply Voltage (VCC).................. +2.375V to +2.625V ......................................................+3.0V to +3.6V Ambient Temperature (TA)................ -40C to +85C Package Thermal Resistance(4) MLFTM (JA) Still-Air ..................................................... 60C/W MLFTM (JB) Junction-to-Board .................................... 38C/W
DC Electrical Characteristics (5)
TA = -40C to +85C, unless otherwise stated.
Symbol VCC ICC RDIFF_IN RIN VIH VIL VIN VDIFF_IN VT_IN
Notes: 1. Permanent device damage may occur if the Absolute Maximum Ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to Absolute Maximum Ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Due to the limited drive capability use for input of the same package only. 4. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. JA and JB are calculated based on a 4-layer board in still air, unless otherwise stated. 5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 6. VIH (min) not lower than 1.2V
Parameter Power Supply Power Supply Current Differential Input Resistance (IN, /IN) Input Resistance (IN-to-VT) Input High Voltage (IN, /IN) Input Low Voltage (IN, /IN) Input Voltage Swing (IN, /IN) Differential Input Voltage Swing (IN, /IN) IN-to-VT
Condition
Min 2.375 3.0
Typ 2.5 3.3 55
Max 2.625 3.6 78 110 55 VCC VIH -0.1 1.7
Units V V mA V V V V
No load, max. VCC 90 45 Note 6 VCC -1.6 0 See Figure 1a. See Figure 1b. 0.1 0.2
100 50
1.28
V
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SY89854U
LVPECL Outputs DC Electrical Characteristics(7)
VCC = +2.5V 5% or +3.3V 10%; TA = -40C to + 85C; RL = 50 to VCC -2V, unless otherwise stated.
Symbol VOH VOL VOUT VDIFF-OUT
Note: 7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Parameter Output HIGH Voltage Q, /Q Output LOW Voltage Q, /Q Output Voltage Swing Q, /Q Differential Output Voltage Swing Q,/Q
Condition
Min VCC-1.145 VCC-1.945
Typ
Max VCC-0.895 VCC-1.695
Units V V mV mV
See Figure 1a. See Figure 1b.
550 1100
800 1600
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SY89854U
AC Electrical Characteristics(8)
VCC = +2.5V 5% or +3.3V 10%; TA = -40C to + 85C, RL = 50 to VCC-2V, unless otherwise stated.
Symbol fMAX tpd tpd Tempco tSKEW Parameter Maximum Operating Frequency Propagation Delay (IN-to-Q) Differential Propagation Delay Temperature Coefficient Output-to-Output Skew Part-to-Part Skew Random Jitter (RJ) tJitter Deterministic Jitter (DJ) Cycle-to-Cycle Jitter Total Jitter tr, tf
Notes: 8. High-frequency AC-parameters are guaranteed by design and characterization. 9. Output-to-output skew is measured between outputs under identical conditions. 10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs. Part-to-part skew includes variation in tpd. 11. Random jitter is measured with a K28.7 character pattern, measured at 2.5Gbps. 12. DJ is measured at 2.5Gbps, with both K28.5 and 2 - 1 PRBS pattern. 13. Cycle-to-cycle jitter definition: The variation of periods between adjacent cycles, Tn - Tn-1 where T is the time between rising edges of the output signal. 14. Total jitter definition: with an ideal clock input of frequency 12 23
Condition Clock, VOUT 400mV NRZ Data VIN 100mVpk
Min 2.0 140
Typ 3.5 2.5 220 100
Max
Units GHz Gbps
340
ps fs/oC
Note 9 Note 10 Note 11 Note 12 Note 13 Note 14 At full output swing. 50
4
20 150 1 10 1 10
ps ps ps(rms) ps(pp) ps(rms) ps(pp) ps
Output Rise/Fall Time (20% to 80%)
100
180
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SY89854U
Typical Operating Characteristics
VCC = 2.5V, VIN = 100mVpk, TA = 25C, unless otherwise stated.
Amplitude vs. Frequency
900 228
Propagation Delay vs. Temperature
PROPAGATION DELAY (ps)
Propagation Delay vs. Input Voltage
222 220 218 216 214 212 210 208
PROPAGATION DELAY (ps)
800
226 224 222 220 218 216 214 212 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C)
AMPLITUDE (mV)
700 600 500 400 300 200 100 200 1200 2200 3200 4200 5200 6200 FREQUENCY (MHz)
900 1000
INPUT VOLTAGE (mV)
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1100
206
100 200
300
400 500
600 700
800
Micrel, Inc.
SY89854U
Functional Characteristics
VCC = 2.5V, VIN = 100mV, TA = 25C, unless otherwise stated.
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SY89854U
Single-Ended and Differential Swings
Figure 1a. Singled-Ended Voltage Swing
Figure1b. Differential Voltage Swing
Timing Diagrams
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SY89854U
Input and Output Stages
Figure 2a. Simplified Differential Input Stage
Figure 2b. Simplified LVPECL Output Stage
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SY89854U
Input Interface Applications
Option: may connect VT to VCC 3a. LVPECL Interface (DC-Coupled) 3b. LVPECL Interface (AC-Coupled) 3c. CML Interface (DC-Coupled)
3d. CML Interface (AC-Coupled)
3e. LVDS Interface
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SY89854U
Output Interface Applications
Note: For +2.5V systems, R1 = 250, R2 = 82.5 Figure 4a. Parallel Thevenin-Equivalent Termination
Note: For +2.5V systems, Rb = 19 For +3.3V systems, Rb = 50 Figure 4b. Parallel Termination (3-Resistor)
Related Product and Support Documentation
Part Number SY58021U Function 4GHz, 1:4 LVPECL Fanout Buffer/Translator with Internal Termination MLFTM Application Note HBW Solutions New Products and Applications Data Sheet Link www.micrel.com/product-info/products/sy58021u.shtml www.amkor.com/products/notes_papers/MLF_AppNote.pdf www.micrel.com/product-info/products/solutions.shtml
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SY89854U
16 Lead MicroLeadFrameTM (MLF-16)
Package Notes: (1) Package meets Level 2 Moisture Sensitivity Classification. (2) All parts are dry-packaged before shipment. (3) Exposed pad must be soldered to a ground for proper thermal management.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2005 Micrel, Incorporated.
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